Digital communication receivers sample an incoming waveform and then reliably detect the sampled data. Typically, a receiver includes a Clock and Data Recovery (CDR) system to recover the clock and data from an incoming data stream. The CDR system generates a clock signal having the same frequency and phase as the incoming signal, which is then used to sample the received signal and detect the transmitted data.
The quality of the received signal is often impaired by inter-symbol interference (ISI), crosstalk, echo, and other noise. In addition, impairments in the receiver itself may further degrade the quality of the received signal. The received signal can be viewed as a well-known “data eye,” which is a superposition of a number of impaired individual signals with varying frequency components, for example, due to ISI and other noise. As the various impairments increase, the quality of an eye diagram or eye trace derived from or otherwise detected by observation of the received signal is impaired.
An eye diagram corresponds to a superposition of samples of a serial data signal over a unit interval of the data signal (i.e., the shortest time period over which the data signal can change state). An eye diagram may be generated by applying the serial data signal to the vertical input of an oscilloscope and triggering a horizontal sweep across the unit interval based on the data rate of the serial data signal. When the serial data signal corresponds to a pseudorandom data signal, the superposed samples appear on the oscilloscope display as an eye diagram with an eye opening bounded by two regions where the data signal voltage approaches the common-mode voltage. Various features of the eye opening reveal information about the quality of the communications channel over which the serial data signal is transmitted. For example, a wide eye opening indicates that the serial data signal has a relatively low noise level and a relatively low bit-error rate, whereas a narrow eye opening indicates that the serial data signal has a relatively high noise level and a relatively high bit-error rate.
“Eye margining” is a technique by which the height and width, or margins, of a data eye can be measured. The eye margin of a receiver can be evaluated following the manufacturing process, or prior to deployment in a given application, to determine if the receiver satisfies one or more predefined margin criteria. If the receiver does not satisfy the one or more predefined margin criteria, the device can be rejected or one or more device parameters can be modified and the margin criteria can be reevaluated. Eye margining is often performed using a classical jitter tolerance technique and eye histogram techniques.
An eye diagram typically is evaluated based on the width of the eye opening, the height of the eye opening, and the rate of closure of the eye opening with variation of the sampling time. The width of the eye opening corresponds to the time interval over which the serial data signal can be sampled without inter-symbol interference. The height of the eye opening corresponds to a measure of the signal-to-noise ratio of the serial data signal. The rate of closure of the eye opening with variation of the sampling time indicates the sensitivity of the serial data signal to timing errors.
Various eye margining or monitoring circuits have been developed that measure one or more characteristic features of an eye diagram of a serial data signal in real-time. The measured features typically are used to correct distortions that are introduced into the serial data signal by the communication channel. For example, the frequency responses of some adaptive equalizers are optimized based on measurements of current signal quality as indicated by one or more characteristic eye diagram features.
In a first conventional approach, a feedback control loop is completed by introducing an error signal at the input to a charge pump to generate an analog signal which is further fed back through phase shifters. This approach is disadvantageous as it provides limited data. In an alternative conventional approach, separate single-quadrant phase rotators are used to generate phase-varying input signals to parallel paths including multiple stage flip flops. While this alternative approach enables the detection of all signal data transitions, it significantly increases the power consumption of the circuit.